Re: Trouble with freeMinT 1.15.0

[Michael Schwingen <rincewind@tubul.dascon.de>]

On Mon, Nov 23, 1998 at 04:43:54PM +0100, Konrad Kokoszkiewicz wrote:
> Since I have no 68040/68060 manuals and no 68040/68060 computers, I can't
> trace the problem down. I guess that the problem is not exactly in the

There are no 68040+ programmer's manuals.

What exists is the M68000PM/AD (M68000 family programmer's manual). The
M68040/M68060 data books contain the additional parts (on movec special
registers, cache/PMMU etc.).

All those manuals are available from Motorola in electronic form (PDF) or on
paper - for free if you order them via the web.

> I would suspect, that switching the cache off for the time of MiNT
> initializations (i.e. for installing handlers, initializing memory,
> filesystems etc) would solve the problem. Especially if, as I understood,
> problems occur only at bootup, i.e. if MiNT finally starts, it works OK. 

Probably - although you still need to be a bit careful: the '040 has a write
pipeline which can *not* be turned off. After modifying a trap vector, you
need a NOP to flush the pipeline if one of the next instructions can cause
the trap:

testit:	move.l	8.w,a0
	move.l	sp,a1
	moveq	#0,d0
	move.l	#catch,8.w
	NOP
	tst.b	some_hardware_address_that_might_fail
	moveq	#1,d0
catch:	move.l	a1,sp
	move.l	a0,8.w
	NOP
	rts	; d0 = 1 if register exists, 0 if bus error occurred

(Frank: you might want to put this in the kernel for ST-ESCC detection or
similar stuff).

> Definitely I didn't introduce any self-modifying code to the kernel. I
> don't like such methods personally.

Agreed - the part I mentioned is a bit difficult to spot.

It is quite probable that modifications somewhere else in the code can cause
cache-related problems to show up. I had multiple cases like this on Milan -
and the MiNT crash on startup with enabled caches only showed on some
machines, and with certain TOS versions.

cu
Michael
-- 
Michael Schwingen, Ahornstrasse 36, 52074 Aachen