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[MiNT] [PATCH][5/5] Fix cache line size alignment checking
Commit message:
Fix cache line size alignment checking.
Contributed by David Galvez.
diff -r a02994a6acc1 -r 0700a79489cc sys/usb/src.km/ucd/ehci/ehci-hcd.c
--- a/sys/usb/src.km/ucd/ehci/ehci-hcd.c Thu Nov 13 14:01:08 2014 +0100
+++ b/sys/usb/src.km/ucd/ehci/ehci-hcd.c Tue Nov 18 18:54:36 2014 +0100
@@ -342,7 +342,6 @@
{
unsigned long delta, next;
unsigned long addr;
- size_t rsz = ROUNDUP(sz, 32);
long idx, r;
r = ehci_bus_getaddr(gehci, (unsigned long)buf, &addr);
@@ -352,9 +351,7 @@
return -1;
}
- if (sz != rsz)
- DEBUG(("EHCI-HCD: Misaligned buffer size (%d)\n", sz));
- if (addr & 31)
+ if (addr & (M68K_CACHE_LINE_SIZE - 1))
DEBUG(("EHCI-HCD: Misaligned buffer address (0x%08lx)\n", buf));
idx = 0;