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Flash of inspiration...



Concerning the problem of DMA in a future VM capable MiNT:-

Whilst I was brushing my teeth this morning I had a flash of inspiration as
to how programs which go straight for the DMA hardware could be tricked into
working in a virtual address space.

The system would map the I/O address space into each process's virtual
address space as a page of read-only RAM which would shadow the real I/O
addresses, one copy per process. When a process writes to what it believes
to be I/O hardware it will cause a fault which would be trapped by the
kernel. The kernel would then examine the memory access, determine what it
was supposed to be doing and act accordingly. The kernel would effectly
emulate the hardware until the point at which the process asks for the DMA
to happen, at which point the kernel translates the addresses and does the
DMA for the process. If the memory access involved is contained in more than
one page then these pages could all be brought into main memory and shuffled
so as to be contiguous before the DMA commenced. OK, it wouldn't be very
good for processes which expected to be real-time, but MiNT isn't real-time
anyway. Also, bringing the DMA process under the control of the kernel would
allow it to be scheduled or queued, or even denied. This would be very
important if MiNT eventually takes over SCSI device access from the horrid
ICD and Atari disk drivers.

Hmm.. what do you think? (Is it all twaddle? :-))

Steve

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Computer Systems Administrator, Dept. of Earth Sciences, Oxford University.
E-Mail: steve@uk.ac.ox.earth (JANET) steve@earth.ox.ac.uk (Internet).  Tel:-
Oxford (0865) 282110 (UK) or +44 865 282110 (International).