Re: [MiNT] FPU question

[Konrad Kokoszkiewicz <draco@mi.com.pl>]

> > I have a question regarding memory mapped FPU's in 68000 machines (e.g.
> > MegaSTE): how does the _FPU cookie look like on such a machine?
> 
> I'm not 100% sure about this, but I believe that the cookie doesn't
> indicate the FPU-interface. However, it's rather easy to figure it out:
> 
> 1. If CPU == 68000 and FPU is present, then the FPU is memory mapped.
> 2. If CPU >= 68020 and FPU is present, then the FPU is a coprocessor.

I know all that. I also know, how to detect a memory mapped FPU. My
question was a bit another: should a memory mapped FPU be considered by
MiNT as a 'true' FPU? See below.
 
> I'm no expert in this area (either), but it appears that the FPU is handled
> by reading/writing to a set of memory-mapped FPU-registers and waiting for
> the result using busy-waiting.

Yes, but SOMETHING has to read/write these registers, no? :) If FPU is in
coprocessor mode, the CPU handles this automagically, FPU instructions
work just as an extension to the CPU instruction set. In memory mapped
mode these registers should be read/written "manually" by Line-F exception
handler.

I know this can be confusing: why the hell an FPU chip might be not
considered a 'true' FPU? Well, because, as I am seeing this, a memory
mapped FPU chip is handled by Line-F exception handler code, so from
MiNT's point of view, it does not differ from a software emulation. So
what happens, if the task switching code tries to save FPU state using
FSAVE?

Anyways, I will know that without getting all of you deeper in these
details, once someone will tell me, how does the damn _FPU cookie looks
like on a 68000 MSTe machine equipped with a coprocessor...

--
Konrad M.Kokoszkiewicz
|mail: draco@mi.com.pl                  | Atari Falcon030/TT030/65XE |
|http://www.obta.uw.edu.pl/~draco/
|http://draco.atari.org

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