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Re: [MiNT] [MiNT][PATCH] FreeMiNT for ColdFire: arch
Here is the first half of the ColdFire patches for the kernel's arch
subdirectory. This subdir is the most complicated one, this is why I split
the work in several patches.
Alan, please commit!
arch1.patch
Added ColdFire support. Contributed by Vincent Riviere.
--
Vincent Rivière
diff -x CVS -aurN freemint.orig/sys/arch/Makefile.objs freemint/sys/arch/Makefile.objs
--- freemint.orig/sys/arch/Makefile.objs 2011-03-25 00:53:54.015625000 +0100
+++ freemint/sys/arch/Makefile.objs 2011-06-02 16:07:59.000000000 +0200
@@ -22,42 +22,17 @@
DEFINITIONS = $(KERNELDEFAULTDEFS) $(KERNELDEFS)
ifneq ($(CPU),030)
-NOCFLAGS-context.S = $(MODEL)
-endif
-CFLAGS-context.S = -m68030
-ifneq ($(CPU),030)
NOCFLAGS-cpu.S = $(MODEL)
endif
CFLAGS-cpu.S = -m68030
ifneq ($(CPU),030)
-NOCFLAGS-detect.S = $(MODEL)
-endif
-CFLAGS-detect.S = -m68030
-ifneq ($(CPU),030)
NOCFLAGS-intr.S = $(MODEL)
endif
CFLAGS-intr.S = -m68030
-ifneq ($(CPU),030)
-NOCFLAGS-mmu030.S = $(MODEL)
-endif
-CFLAGS-mmu030.S = -m68030
-ifneq ($(CPU),040)
-NOCFLAGS-mmu040.S = $(MODEL)
-endif
-CFLAGS-mmu040.S = -m68040
-
ifneq ($(CPU),020-60)
NOCFLAGS-syscall.S = $(MODEL)
endif
CFLAGS-syscall.S = -m68020-60
-ifneq ($(CPU),020)
-NOCFLAGS-user_things.S = $(MODEL)
-endif
-CFLAGS-user_things.S = -m68020
-ifneq ($(CPU),000)
-NOCFLAGS-kernel.S = $(MODEL)
-endif
-CFLAGS-kernel.S = -m68000
cflags = $(kernel_cflags)
nocflags = $(kernel_nocflags)
diff -x CVS -aurN freemint.orig/sys/arch/context.S freemint/sys/arch/context.S
--- freemint.orig/sys/arch/context.S 2010-01-15 20:44:35.187500000 +0100
+++ freemint/sys/arch/context.S 2011-06-02 16:52:04.578125000 +0200
@@ -48,6 +48,10 @@
* flush the ATC.
*/
+#ifndef __mcoldfire__
+ .arch 68030
+#endif
+
#include "magic/magic.i"
.text
@@ -112,7 +116,12 @@
fsave C_FSTATE(a0) // save internal state frame
#ifndef M68000
+#ifdef __mcoldfire__
+ moveq #60,d1
+ cmp.w _mcpu+2,d1 // on 68060 frame format is different
+#else
cmp.w #60,_mcpu+2 // on 68060 frame format is different
+#endif
bne.s no60
tst.b C_FSTATE+2(a0) // if NULL frame then the FPU is not in use
beq.s nofpu // skip programmer's model save
@@ -121,22 +130,50 @@
#endif
tst.b C_FSTATE(a0) // if NULL frame then the FPU is not in use
beq.s nofpu // skip programmer's model save
+#ifdef __mcoldfire__
+save: fmovem.d fp0-fp7,C_FREGS(a0) // save data registers
+ fmove.l fpcr,C_FCTRL(a0) // and control registers
+ fmove.l fpsr,C_FCTRL+4(a0)
+ fmove.l fpiar,C_FCTRL+8(a0)
+#else
save: fmovem.x fp0-fp7,C_FREGS(a0) // save data registers
fmovem.l fpcr/fpsr/fpiar,C_FCTRL(a0) // and control registers
+#endif
nofpu:
lea C_SFMT(a0),a2
+#ifdef __mcoldfire__
+ moveq #0,d1
+#endif
move.w (a1)+,d1 // fetch frame format word
move.w d1,(a2)+ // and stash it away for later
+#ifdef __mcoldfire__
+ lsr.l #8,d1 // isolate the frame format identifier
+ lsr.l #4,d1
+#else
lsr.w #8,d1 // isolate the frame format identifier
lsr.w #4,d1
+#endif
lea _framesizes,a3
+#ifdef __mcoldfire__
+ move.b 0(a3,d1.l),d1
+#else
move.b 0(a3,d1.w),d1
+#endif
beq.s short1 // if no data to save, skip this
+#ifdef __mcoldfire__
+ subq.l #1,d1 // correct for first time through loop
+#else
subq.w #1,d1 // correct for first time through loop
+#endif
bcint:
move.w (a1)+,(a2)+ // copy CPU internal state
bcover:
+#ifdef __mcoldfire__
+ subq.l #1,d1
+ bpl.s bcint
+#else
dbra d1,bcint
+#endif
short1:
move.l a1,C_SSP(a0) // a1 now points above the state frame
move.l usp,a1 // save user stack pointer
@@ -148,7 +185,12 @@
// means not testing longframe again. (AKP)
move.l C_SSP(a0),a1 // was using super stack pointer before interrupt
L_CONT1:
+#ifdef __mcoldfire__
+ move.l (0x408).w,d1
+ move.l d1,C_TERM(a0) // save GEMDOS terminate vector
+#else
move.l (0x408).w,C_TERM(a0) // save GEMDOS terminate vector
+#endif
move.l (sp)+,C_A0(a0) // save old register a0
rts
@@ -179,7 +221,12 @@
beq.s nofpu2
fsave C_FSTATE(a0) // save internal state frame
#ifndef M68000
+#ifdef __mcoldfire__
+ moveq #60,d1
+ cmp.w _mcpu+2,d1 // on 68060 frame format is different
+#else
cmp.w #60,_mcpu+2 // on 68060 frame format is different
+#endif
bne.s no60_2
tst.b C_FSTATE+2(a0) // if NULL frame then the FPU is not in use
beq.s nofpu2 // skip programmer's model save
@@ -188,8 +235,15 @@
#endif
tst.b C_FSTATE(a0) // if NULL frame then the FPU is not in use
beq.s nofpu2 // skip programmer's model save
+#ifdef __mcoldfire__
+save2: fmovem.d fp0-fp7,C_FREGS(a0) // save data registers
+ fmove.l fpcr,C_FCTRL(a0) // and control registers
+ fmove.l fpsr,C_FCTRL+4(a0)
+ fmove.l fpiar,C_FCTRL+8(a0)
+#else
save2: fmovem.x fp0-fp7,C_FREGS(a0) // save data registers
fmovem.l fpcr/fpsr/fpiar,C_FCTRL(a0) // and control registers
+#endif
nofpu2:
// note: I am somewhat unsure of this assumption, viz that save_context
// can never be called in a situation where a co-processor
@@ -206,14 +260,26 @@
move.l -4(a1),C_PC(a0) // save PC
move.l usp,a1
move.l a1,C_USP(a0) // save user stack pointer
+#ifdef __mcoldfire__
+ move.w sr,d1
+ move.w d1,C_SR(a0) // save status register
+ move.l (0x408).w,d1
+ move.l d1,C_TERM(a0) // save GEMDOS terminate vector
+#else
move.w sr,C_SR(a0) // save status register
move.l (0x408).w,C_TERM(a0) // save GEMDOS terminate vector
+#endif
move.l (sp)+,C_A0(a0) // save old a0
clr.l d0 // return 0
rts
-
_restore_context:
+#ifdef __mcoldfire__
+ move.w sr,d1
+ ori.l #0x0400,d1
+ move.w d1,sr
+#else
ori.w #0x0400,sr
+#endif
move.l 4(sp),a0 // address of context save area
// Switch stacks now - starting now ssp is in the memory space of
@@ -226,7 +292,12 @@
move.l a1,sp
move.l C_USP(a0),a1
move.l a1,usp // set user stack pointer
+#ifdef __mcoldfire__
+ move.l C_TERM(a0),d1
+ move.l d1,(0x408).w // restore GEMDOS terminate vector
+#else
move.l C_TERM(a0),(0x408).w // restore GEMDOS terminate vector
+#endif
// Set memory context now: actually, this isn't necessary, since
// we're coming back to a context in the same process as is running
@@ -243,20 +314,46 @@
#endif
lea C_SFMT(a0),a1
move.w (a1)+,d0 // fetch frame format word
+#ifdef __mcoldfire__
+ moveq #0,d1
+#endif
move.w d0,d1 // copy it for later
+#ifdef __mcoldfire__
+ lsr.l #8,d1 // isolate the frame format identifier
+ lsr.l #4,d1
+#else
lsr.w #8,d1 // isolate the frame format identifier
lsr.w #4,d1
+#endif
lea _framesizes,a2
+#ifdef __mcoldfire__
+ move.b 0(a2,d1.l),d1
+#else
move.b 0(a2,d1.w),d1
+#endif
beq.s rcovernc // if no data to copy, skip the copy
+#ifdef __mcoldfire__
+ sub.l d1,sp
+ sub.l d1,sp
+#else
sub.w d1,sp
sub.w d1,sp
+#endif
move.l sp,a2
+#ifdef __mcoldfire__
+ subq.l #1,d1 // correct for first time through loop
+#else
subq.w #1,d1 // correct for first time through loop
+#endif
rcint:
move.w (a1)+,(a2)+
rcover:
+#ifdef __mcoldfire__
+ subq.l #1,d1
+ bpl.s rcint
+#else
dbf d1,rcint
+#endif
rcovernc:
move.w d0,-(sp) // frame format identifier
@@ -264,7 +361,12 @@
tst.w _fpu // is there a true FPU in the system
beq.s short3
#ifndef M68000
+#ifdef __mcoldfire__
+ moveq #60,d1
+ cmp.w _mcpu+2,d1 // on 68060 frame format is different
+#else
cmp.w #60,_mcpu+2 // on 68060 frame format is different
+#endif
bne.s no60_3
tst.b C_FSTATE+2(a0)
beq.s short4
@@ -273,8 +375,15 @@
#endif
tst.b C_FSTATE(a0) // if NULL frame then the FPU is not in use
beq.s short4 // skip programmer's model restore
+#ifdef __mcoldfire__
+save3: fmove.l C_FCTRL(a0),fpcr // restore control registers
+ fmove.l C_FCTRL+4(a0),fpsr
+ fmove.l C_FCTRL+8(a0),fpiar
+ fmovem.d C_FREGS(a0),fp0-fp7 // and data registers
+#else
save3: fmovem.l C_FCTRL(a0),fpcr/fpsr/fpiar // restore control registers
fmovem.x C_FREGS(a0),fp0-fp7 // and data registers
+#endif
short4:
frestore C_FSTATE(a0) // finally the internal state
short3:
@@ -289,7 +398,13 @@
_change_context:
+#ifdef __mcoldfire__
+ move.w sr,d1
+ ori.l #0x0400,d1 // mask interrupts
+ move.w d1,sr
+#else
ori.w #0x0400,sr // mask interrupts
+#endif
move.l 4(sp),a0 // address of context save area
// Switch stacks now - starting now ssp is in the memory space of
@@ -302,7 +417,12 @@
move.l a1,sp
move.l C_USP(a0),a1
move.l a1,usp // set user stack pointer
+#ifdef __mcoldfire__
+ move.l C_TERM(a0),d1
+ move.l d1,(0x408).w // restore GEMDOS terminate vector
+#else
move.l C_TERM(a0),(0x408).w // restore GEMDOS terminate vector
+#endif
#ifndef M68000
// Set memory context now
@@ -329,20 +449,46 @@
#endif
lea C_SFMT(a0),a1
move.w (a1)+,d0 // fetch frame format word
+#ifdef __mcoldfire__
+ moveq #0,d1
+#endif
move.w d0,d1 // copy it for later
+#ifdef __mcoldfire__
+ lsr.l #8,d1 // isolate the frame format identifier
+ lsr.l #4,d1
+#else
lsr.w #8,d1 // isolate the frame format identifier
lsr.w #4,d1
+#endif
lea _framesizes,a2
+#ifdef __mcoldfire__
+ move.b 0(a2,d1.l),d1
+#else
move.b 0(a2,d1.w),d1
+#endif
beq.s rcover2nc // if no data to copy, skip it
+#ifdef __mcoldfire__
+ sub.l d1,sp
+ sub.l d1,sp
+#else
sub.w d1,sp
sub.w d1,sp
+#endif
move.l sp,a2
+#ifdef __mcoldfire__
+ subq.l #1,d1 // correct for first time through loop
+#else
subq.w #1,d1 // correct for first time through loop
+#endif
rcint2:
move.w (a1)+,(a2)+
rcover2:
+#ifdef __mcoldfire__
+ subq.l #1,d1
+ bpl.s rcint2
+#else
dbf d1,rcint2
+#endif
rcover2nc:
move.w d0,-(sp) // frame format identifier
@@ -352,7 +498,12 @@
beq.s short6
#ifndef M68000
+#ifdef __mcoldfire__
+ moveq #60,d1
+ cmp.w _mcpu+2,d1 // on 68060 frame format is different
+#else
cmp.w #60,_mcpu+2 // on 68060 frame format is different
+#endif
bne.s no60_4
tst.b C_FSTATE+2(a0)
beq.s short5
@@ -361,8 +512,15 @@
#endif
tst.b C_FSTATE(a0) // if NULL frame then the FPU is not in use
beq.s short5 // skip programmer's model restore
+#ifdef __mcoldfire__
+save5: fmove.l C_FCTRL(a0),fpcr // restore control registers
+ fmove.l C_FCTRL+4(a0),fpsr
+ fmove.l C_FCTRL+8(a0),fpiar
+ fmovem.d C_FREGS(a0),fp0-fp7 // and data registers
+#else
save5: fmovem.l C_FCTRL(a0),fpcr/fpsr/fpiar // restore control registers
fmovem.x C_FREGS(a0),fp0-fp7 // and data registers
+#endif
short5:
frestore C_FSTATE(a0) // finally the internal state
short6:
diff -x CVS -aurN freemint.orig/sys/arch/detect.S freemint/sys/arch/detect.S
--- freemint.orig/sys/arch/detect.S 2007-03-19 22:05:48.000000000 +0100
+++ freemint/sys/arch/detect.S 2011-06-02 16:52:11.484375000 +0200
@@ -20,6 +20,10 @@
*
*/
+#ifndef __mcoldfire__
+ .arch 68030
+#endif
+
// Test hardware registers for presence
.globl _test_byte_rd
@@ -93,13 +97,21 @@
_detect_hardware:
+#ifdef __mcoldfire__
+ move.l d2,-(sp)
+#endif
moveq #0,d0 // initialize return value
// *** detect ST-ESCC (Harun Scheutzow's extension to normal ST(E)s providing modem2 and serial2)
move.l sp,a1 // save stack pointer
move.l (8).w,a0 // save bus error vector
+#ifdef __mcoldfire__
+ move.l #no_stescc,d2
+ move.l d2,(8).w // set temporary new bus error vector
+#else
move.l #no_stescc,(8).w // set temporary new bus error vector
+#endif
nop // flush write pipeline (>= 040)
move.w SR,d1
@@ -107,13 +119,24 @@
// 700 dec is 0x02bc hex, so it really raised the IPL, but MFP
// interrupts were't disabled (they're IPL 5 IIRC).
+#ifdef __mcoldfire__
+ move.w SR,d2
+ ori.l #0x0700,d2 // disable interrupts
+ move.w d2,SR
+#else
ori.w #0x0700,SR // disable interrupts
+#endif
// The next instruction will cause a bus error if there is no
// ST-compatible MFP, which makes the odd addresses 0xFFFFFA01 -
// 0xFFFFFA3F accessible and is neccessary for the ST-ESCC extension
+#ifdef __mcoldfire__
+ moveq #3,d2
+ move.b d2,(0xFFFFFA31).w // select register 3, channel B
+#else
move.b #3,(0xFFFFFA31).w // select register 3, channel B
+#endif
// If we reach the following instruction we have a ST-compatible MFP.
// If there is an ST-ESCC we have already selected register 3 of channel B,
@@ -121,10 +144,21 @@
tst.b (0xFFFFFA31).w // register is always 0 if ST-ESCC present
bne.s no_stescc // no -> no ST-ESCC present
+#ifdef __mcoldfire__
+ move.w #0xFA35,d2
+ move.w d2,_ControlRegA+2 // set register adresses to ST-ESCC's
+ move.w #0xFA37,d2
+ move.w d2,_DataRegA+2
+ move.w #0xFA31,d2
+ move.w d2,_ControlRegB+2
+ move.w #0xFA33,d2
+ move.w d2,_DataRegB+2
+#else
move.w #0xFA35,_ControlRegA+2 // set register adresses to ST-ESCC's
move.w #0xFA37,_DataRegA+2
move.w #0xFA31,_ControlRegB+2
move.w #0xFA33,_DataRegB+2
+#endif
bset #0x00,d0 // mark ST-ESCC present
no_stescc: // bus error occured or reg 3 != 0 -> ST-ESCC not present
move.w d1,SR // enable interrupts
@@ -134,6 +168,9 @@
// next detection should start here
+#ifdef __mcoldfire__
+ move.l (sp)+,a2
+#endif
rts
.data
diff -x CVS -aurN freemint.orig/sys/arch/kernel.S freemint/sys/arch/kernel.S
--- freemint.orig/sys/arch/kernel.S 2007-07-13 23:32:49.000000000 +0200
+++ freemint/sys/arch/kernel.S 2011-05-25 21:13:04.750000000 +0200
@@ -49,7 +49,12 @@
.text
_enter_gemdos:
+#ifdef __mcoldfire__
+ moveq #0x07,d0
+ bset d0,_in_kernel
+#else
bset #0x07,_in_kernel
+#endif
bne.s exit
move.l _curproc,a0
move.w #0x0001,P_INDOS(a0)
@@ -57,7 +62,12 @@
exit: rts
_enter_kernel:
- bset #0x7,_in_kernel
+#ifdef __mcoldfire__
+ moveq #0x7,d0
+ bset d0,_in_kernel
+#else
+ bset #0x7,_in_kernel
+#endif
bne.s exit
move.l _curproc,a0
move.w #1,P_INKERN(a0)
diff -x CVS -aurN freemint.orig/sys/arch/mmu040.S freemint/sys/arch/mmu040.S
--- freemint.orig/sys/arch/mmu040.S 2006-01-25 14:18:03.000000000 +0100
+++ freemint/sys/arch/mmu040.S 2011-05-25 21:56:44.546875000 +0200
@@ -194,7 +194,13 @@
_read_phys:
move.l 4(sp),a0 // get address to read
move sr,d1
+#ifdef __mcoldfire__
+ move.w sr,d0
+ ori.l #0x700,d0 // disable all interrupts
+ move.w d0,sr
+#else
ori #0x700,sr // disable all interrupts
+#endif
move.l #0x00ffe060,d0 // value for DTT0: transparently
// translate all data accesses, not using
diff -x CVS -aurN freemint.orig/sys/arch/user_things.S freemint/sys/arch/user_things.S
--- freemint.orig/sys/arch/user_things.S 2007-07-13 23:32:49.000000000 +0200
+++ freemint/sys/arch/user_things.S 2011-06-02 22:16:12.390625000 +0200
@@ -91,7 +91,7 @@
// (sp) (long) signal number -- was a parameter for user routine
sig_return:
- addq.w #8,sp // pop signal number and sfmt
+ addq.l #8,sp // pop signal number and sfmt
move.w #0x011a,-(sp) // Psigreturn() system call
trap #1
pc_valid_return: // tells kernel its us
@@ -205,12 +205,17 @@
trap #1
addq.l #4,sp
- move.w #0x0004,d7
+ moveq #0x0004,d7
loop: move.w d7,-(sp) // Fclose(x)
move.w #0x003e,-(sp)
trap #1
addq.l #4,sp
+#ifdef __mcoldfire__
+ subq.l #1,d7
+ bpl.s loop
+#else
dbra.w d7,loop
+#endif
clr.l -(sp) // Psetpgrp(0,0)
move.w #0x010e,-(sp)
@@ -219,20 +224,40 @@
move.l 4(sp),a0 // basepage pointer
lea 256(a0),a0 // begin of the TEXT segment
+#ifdef __mcoldfire__
+ move.l #0x283a001a,d0
+ cmp.l (a0),d0
+#else
cmp.l #0x283a001a,(a0)
+#endif
bne.s oldfmt
+#ifdef __mcoldfire__
+ move.l #0x4efb48fa,d0
+ cmp.l 4(a0),d0
+#else
cmp.l #0x4efb48fa,4(a0)
+#endif
bne.s oldfmt
lea 228.w(a0),a0 // the header is a bit bigger (new format)
oldfmt: move.l a0,-(sp) // 4 bytes go to the stack
+#ifdef __mcoldfire__
+ move.l #0x70004afc,d0
+ cmp.l (a0),d0
+#else
cmp.l #0x70004afc,(a0) // a0 = SLB header address
+#endif
beq.s exec
move.l 8(sp),a0
+#ifdef __mcoldfire__
+ moveq #-1,d0
+ move.l d0,B_CMDLIN(a0) // put -1 on the bp->p_cmdlin
+#else
move.l #-1,B_CMDLIN(a0) // put -1 on the bp->p_cmdlin
+#endif
bsr.s slb_stop // Slbopen() will now read the status