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Re: [MiNT] [PATCH] FreeMiNT for ColdFire: arch (second half)
And finally, the ColdFire patch for the second half of the arch subdir. This
one was tricky.
Alan, please commit!
arch2.patch
Added ColdFire support. Contributed by Vincent Riviere.
--
Vincent Rivière
diff -x CVS -aurN freemint.orig/sys/arch/Makefile.objs freemint/sys/arch/Makefile.objs
--- freemint.orig/sys/arch/Makefile.objs 2011-06-04 07:20:25.812500000 +0200
+++ freemint/sys/arch/Makefile.objs 2011-06-11 21:11:25.875000000 +0200
@@ -21,19 +21,6 @@
INCLUDES = -I$(top_srcdir)
DEFINITIONS = $(KERNELDEFAULTDEFS) $(KERNELDEFS)
-ifneq ($(CPU),030)
-NOCFLAGS-cpu.S = $(MODEL)
-endif
-CFLAGS-cpu.S = -m68030
-ifneq ($(CPU),030)
-NOCFLAGS-intr.S = $(MODEL)
-endif
-CFLAGS-intr.S = -m68030
-ifneq ($(CPU),020-60)
-NOCFLAGS-syscall.S = $(MODEL)
-endif
-CFLAGS-syscall.S = -m68020-60
-
cflags = $(kernel_cflags)
nocflags = $(kernel_nocflags)
diff -x CVS -aurN freemint.orig/sys/arch/cpu.S freemint/sys/arch/cpu.S
--- freemint.orig/sys/arch/cpu.S 2011-06-11 21:09:57.218750000 +0200
+++ freemint/sys/arch/cpu.S 2011-06-11 14:47:25.859375000 +0200
@@ -21,10 +21,20 @@
.globl _mcpu
_get_superscalar:
+#ifdef __mcoldfire__
+ moveq #60,d1
+ cmp.w _mcpu+2,d1
+ bpl.s ssret
+#else
cmp.w #60,_mcpu+2
bmi.s ssret
+#endif
dc.l 0x4e7a0808 // movec pcr,d0
+#ifdef __mcoldfire__
+ ori.l #0x0001,d0 // enable the superscalar dispatch
+#else
ori.w #0x0001,d0 // enable the superscalar dispatch
+#endif
dc.l 0x4e7b0808 // movec d0,pcr
ssret: rts
@@ -32,10 +42,20 @@
_is_superscalar:
clr.w d0
+#ifdef __mcoldfire__
+ moveq #60,d1
+ cmp.w _mcpu+2,d1
+ bpl.s ssret
+#else
cmp.w #60,_mcpu+2
bmi.s ssret
+#endif
dc.l 0x4e7a0808 // movec pcr,d0
+#ifdef __mcoldfire__
+ andi.l #0x0001,d0
+#else
andi.w #0x0001,d0
+#endif
rts
//
@@ -68,7 +88,12 @@
// init cache routines
_init_cache:
+#ifdef __mcoldfire__
+ lea -24(sp),sp
+ movem.l d0-d1/a0-a3,(sp)
+#else
movem.l d0-d1/a0-a3,-(sp)
+#endif
move.l _mcpu,d0
beq icquit
cmp.w #10,d0
@@ -99,9 +124,20 @@
move.l a1,l2cv
move.l a2,c2lv
move.l a3,_cacheveci
+#ifdef __mcoldfire__
+ moveq #-1,d0
+ move.b d0,hascaches
+#else
st hascaches
+#endif
nop
-icquit: movem.l (sp)+,d0-d1/a0-a3
+icquit:
+#ifdef __mcoldfire__
+ movem.l (sp),d0-d1/a0-a3
+ lea 24(sp),sp
+#else
+ movem.l (sp)+,d0-d1/a0-a3
+#endif
rts
// Cache control routines.
@@ -160,8 +196,14 @@
_ccw_set:
tst.w hascaches
+#ifdef __mcoldfire__
+ beq clq
+ lea -20(sp),sp
+ movem.l d1-d2/a0-a2,(sp)
+#else
beq.s clq
movem.l d1-d2/a0-a2,-(sp)
+#endif
bsr.s _ccw_get // get the current CCW
move.l d0,-(sp) // save it for later reference
move.l 28(sp),d1 // user specified CCW
@@ -171,14 +213,23 @@
and.l d2,d0 // clear bits to change in actual CCW
or.l d0,d1 // apply user CCW bits
bsr _ccw_getdmask
+#ifdef __mcoldfire__
+ and.l d1,d0
+#else
and.w d1,d0
+#endif
and.l #0x0000ffff,d0
move.l d0,-(sp) // save new CCW
move.l l2cv,a0 // convert new CCW ...
jsr (a0)
move.l (sp)+,d2 // restore new CCW
move.l (sp)+,d1 // restore old CCW
+#ifdef __mcoldfire__
+ move.w _mcpu+2,a0
+ cmpa.l #40,a0 // the following is only necessary
+#else
cmpi.w #40,_mcpu+2 // the following is only necessary
+#endif
blt.s lt040 // on 68040 and 68060 (copyback cache!)
btst #0,d2 // instruction cache going to be enabled?
beq.s ic_off
@@ -203,7 +254,12 @@
dc.w 0xF478 // cpusha dc
lt040:
movec d0,cacr // write CACR
+#ifdef __mcoldfire__
+ movem.l (sp),d1-d2/a0-a2
+ lea 20(sp),sp
+#else
movem.l (sp)+,d1-d2/a0-a2
+#endif
clq: clr.l d0 // E_OK
rts
@@ -212,15 +268,29 @@
_ccw_get:
tst.w hascaches
beq.s clq
+#ifdef __mcoldfire__
+ lea -20(sp),sp
+ movem.l d1-d2/a0-a2,(sp)
+#else
movem.l d1-d2/a0-a2,-(sp)
- movec cacr,d0 // read CACR
+#endif
+ dc.w 0x4e7a,0x0002 // movec cacr,d0
move.l c2lv,a0 // convert
jsr (a0)
move.w d0,d1
bsr.s _ccw_getdmask
+#ifdef __mcoldfire__
+ and.l d1,d0
+#else
and.w d1,d0
+#endif
and.l #0x0000ffff,d0
+#ifdef __mcoldfire__
+ movem.l (sp),d1-d2/a0-a2
+ lea 20(sp),sp
+#else
movem.l (sp)+,d1-d2/a0-a2
+#endif
rts
// get default Cache Control Mask for currently used CPU
@@ -230,7 +300,11 @@
divu.w #5,d0
and.l #0x0000ffff,d0 // better to be safe...
lea ccw_dmasks,a0
+#ifdef __mcoldfire__
+ move.w 0(a0,d0.l),d0 // _not_ a (a0,d0.w*2), see divu
+#else
move.w 0(a0,d0.w),d0 // _not_ a (a0,d0.w*2), see divu
+#endif
rts
// These are called by routines above. Notice CACR is ulong,
@@ -238,16 +312,31 @@
// 68020, bit 0 enables the cache, bit 1 freezes it.
-l2c020: move.w d0,d1
+l2c020:
+#ifdef __mcoldfire__
+ mvz.w d0,d1
+ and.l #0x0001,d0 // leave the CE bit
+ lsr.l #0x02,d1 // shift the CF bit left
+ or.l d1,d0
+#else
+ move.w d0,d1
and.w #0x0001,d0 // leave the CE bit
lsr.w #0x02,d1 // shift the CF bit left
or.w d1,d0
+#endif
rts
-c2l020: move.l d0,d1
+c2l020:
+ move.l d0,d1
+#ifdef __mcoldfire__
+ and.l #0x0001,d0
+ lsl.l #0x02,d1
+ or.l d1,d0
+#else
and.w #0x0001,d0
lsl.w #0x02,d1
or.w d1,d0
+#endif
rts
// 68030
@@ -263,35 +352,97 @@
l2c030: lea cacr30,a0
clr.l d1
moveq #0x07,d2
-l30: lsr.w #0x01,d0
+l30:
+#ifdef __mcoldfire__
+ lsr.l #0x01,d0
+#else
+ lsr.w #0x01,d0
+#endif
bcc.s s30
+#ifdef __mcoldfire__
+ move.w (a0),d0
+ or.l d0,d1
+#else
or.w (a0),d1
+#endif
s30: addq.l #0x02,a0
+#ifdef __mcoldfire__
+ subq.l #1,d2
+ bpl.s l30
+#else
dbra.w d2,l30
+#endif
move.l d1,d0
rts
c2l030: lea ccw30,a0
clr.l d1
moveq #0x0f,d2
-c30: lsr.w #0x01,d0
+c30:
+#ifdef __mcoldfire__
+ lsr.l #0x01,d0
+#else
+ lsr.w #0x01,d0
+#endif
bcc.s s31
+#ifdef __mcoldfire__
+ mvz.w (a0),d0
+ or.l d0,d1
+#else
or.w (a0),d1
+#endif
s31: addq.l #0x02,a0
+#ifdef __mcoldfire__
+ subq.l #1,d2
+ bpl.s c30
+#else
dbra.w d2,c30
+#endif
move.l d1,d0
rts
// 68040, bit 15 enables the instruction cache, bit 31 enables the data cache.
-l2c040: ror.l #0x01,d0 // move IE bit to position 31
+l2c040:
+#ifdef __mcoldfire__
+ move.l d1,-(sp)
+ moveq #0,d1
+ btst #0,d0 // IE bit
+ beq.s l2c040ieok
+ bset #15,d1
+l2c040ieok:
+ btst #1,d0 // DE bit
+ beq.s l2c040deok
+ bset #31,d1
+l2c040deok:
+ move.l d1,d0
+ move.l (sp)+,d1
+#else
+ ror.l #0x01,d0 // move IE bit to position 31
ror.w #0x01,d0 // move DE bit to position 15
swap d0 // swap them
+#endif
rts
-c2l040: swap d0
+c2l040:
+#ifdef __mcoldfire__
+ move.l d1,-(sp)
+ moveq #0,d1
+ btst #15,d0 // IE bit
+ beq.s c2l040ieok
+ bset #0,d1
+c2l040ieok:
+ btst #31,d0 // DE bit
+ beq.s c2l040deok
+ bset #1,d1
+c2l040deok:
+ move.l d1,d0
+ move.l (sp)+,d1
+#else
+ swap d0
rol.w #0x01,d0
rol.l #0x01,d0
+#endif
rts
// 68060
@@ -315,11 +466,21 @@
l2c060: lea cacr60,a0
clr.l d1
moveq #0x0f,d2
-l60: lsr.w #0x01,d0
+l60:
+#ifdef __mcoldfire__
+ lsr.l #0x01,d0
+#else
+ lsr.w #0x01,d0
+#endif
bcc.s s60
or.l (a0),d1
s60: addq.l #0x04,a0
+#ifdef __mcoldfire__
+ subq.l #1,d2
+ bpl.s l60
+#else
dbra.w d2,l60
+#endif
move.l d1,d0
eori.l #0x58006000,d0 // adjust reverted bits
rts
@@ -331,11 +492,25 @@
moveq #0x13,d2
c60: lsr.l #0x01,d0
bcc.s s61
+#ifdef __mcoldfire__
+ mvz.w (a0),d0
+ or.l d0,d1
+#else
or.w (a0),d1
+#endif
s61: addq.l #0x02,a0
+#ifdef __mcoldfire__
+ subq.l #1,d2
+ bpl.s c60
+#else
dbra.w d2,c60
+#endif
move.l d1,d0
+#ifdef __mcoldfire__
+ eor.l #0x4f00,d0 // adjust reverted bits
+#else
eor.w #0x4f00,d0 // adjust reverted bits
+#endif
rts
#endif
@@ -370,7 +545,7 @@
jmp (a1)
_cache030: // 68030 cache
- movec cacr,d1
+ dc.w 0x4e7a,0x1002 // movec cacr,d1
move.l d1,-(sp)
addq.l #1,d0 // if was -1
beq.s abc030 // then flush everything
@@ -379,16 +554,31 @@
cmp.l #64,d0
bcs.s fls030 // dump selectively
-abc030: or.w #0x0808,d1
+abc030:
+#ifdef __mcoldfire__
+ or.l #0x0808,d1
+#else
+ or.w #0x0808,d1
+#endif
movec d1,cacr
bra.s rescacr
-fls030: or.w #0x0404,d1 // clear DC/IC entries
+fls030:
+#ifdef __mcoldfire__
+ or.l #0x0404,d1 // clear DC/IC entries
+#else
+ or.w #0x0404,d1 // clear DC/IC entries
+#endif
// run through d0+1 times (since a0 may not be on a long boundary)
-do030: movec a0,caar
+do030: dc.w 0x4e7b,0x8802 // movec a0,caar
movec d1,cacr
- addq.w #4,a0
+ addq.l #4,a0
+#ifdef __mcoldfire__
+ subq.l #1,d0
+ bpl.s do030
+#else
dbf d0,do030
+#endif
rescacr:
move.l (sp)+,d0
movec d0,cacr
@@ -418,7 +608,11 @@
fls040:
// run through d0+1 times (since a0 may not be on a line boundary)
move.l a0,d1
+#ifdef __mcoldfire__
+ and.l #0xfffffff0,d1
+#else
and.w #0xfff0,d1
+#endif
movea.l d1,a1
moveq #16,d1
do040:
@@ -435,14 +629,20 @@
cmpa.l #-1,a0
beq.s abc040 // if there's no physical address, flush all
dc.w 0xF468 // this is "cpushl dc,(a0)" for the '040
- add.w d1,a1
+ add.l d1,a1
+#ifdef __mcoldfire__
+ subq.l #1,d0
+ bpl.s do040
+#else
dbf d0,do040
+#endif
_c060rts:
rts
_cache060:
move.l d0,d1 // If no bytes to push, exit
beq.s _c060rts
+#ifndef COLDFIRE
addq.l #1,d1 // If was -1
beq.s abc040 // then fulsh everything
move.l a0,d1 // extract the position within the cacheline
@@ -451,7 +651,6 @@
add.l d1,d0 // only push this one cacheline
lsr.l #4,d0 // how many cachelines we need to push
cmp.l #512,d0
-#ifndef COLDFIRE
bcs.s fls040
#endif
dc.w 0xF478 // see abc040
@@ -480,7 +679,11 @@
fls040i:
// run through d0+1 times (since a0 may not be on a line boundary)
move.l a0,d1
+#ifdef __mcoldfire__
+ and.l #0xfffffff0,d1
+#else
and.w #0xfff0,d1
+#endif
movea.l d1,a1
moveq #16,d1
do040i:
@@ -498,14 +701,20 @@
beq.s abc040i // if there's no physical address, flush all
dc.w 0xF468 // this is "cpushl dc,(a0)"
dc.w 0xF488 // this is "cinvl ic,(a0)"
- add.w d1,a1
+ add.l d1,a1
+#ifdef __mcoldfire__
+ subq.l #1,d0
+ bpl.s do040i
+#else
dbf d0,do040i
+#endif
_c060rtsi:
rts
_cache060_i:
move.l d0,d1 // If no bytes to push, exit
beq.s _c060rtsi
+#ifndef COLDFIRE
addq.l #1,d1 // If was -1
beq.s abc040i // then fulsh everything
move.l a0,d1 // extract the position within the cacheline
@@ -514,7 +723,6 @@
add.l d1,d0 // only push this one cacheline
lsr.l #4,d0 // how many cachelines we need to push
cmp.l #512,d0
-#ifndef COLDFIRE
bcs.s fls040i
#endif
dc.w 0xF478 // this is "cpusha dc"
@@ -543,8 +751,15 @@
// a0: physical address (-1 if the address is not currently mapped)
log2phys:
+#ifdef __mcoldfire__
+ lea -16(sp),sp
+ movem.l d0-d2/a1,(sp) // save some registers
+ move.w _mcpu+2,d0
+ cmpi.w #60,d0 // is this a 060?
+#else
movem.l d0-d2/a1,-(sp) // save some registers
cmpi.w #60,_mcpu+2 // is this a 060?
+#endif
beq.s l2p_060 // yes, so use plpa
dc.w 0x4e7a,0x0003 // movec tc,d0
btst #15,d0
@@ -568,11 +783,22 @@
bra.s l2p_exit
l2p_resident:
and.l d2,d0 // extract the physical page address
+#ifdef __mcoldfire__
+ move.l d0,d2
+ move.l a0,d0
+ move.l d2,a0
+#else
exg d0,a0
+#endif
and.l d1,d0 // extract the offset from the logical address
add.l d0,a0 // and build the effective phyiscal address
l2p_exit:
+#ifdef __mcoldfire__
+ movem.l (sp),d0-d2/a1 // restore registers
+ lea 16(sp),sp
+#else
movem.l (sp)+,d0-d2/a1 // restore registers
+#endif
rts
// Here's the code for the MC68060. Note that it needs a temporary
@@ -584,15 +810,33 @@
beq.s l2p_exit
// Install the temporary access exception handler
move.w sr,d1
+#ifdef __mcoldfire__
+ move.w sr,d0
+ ori.l #0x700,d0
+ move.w d0,sr
+#else
ori #0x700,sr
- movec vbr,a1
+#endif
+ dc.w 0x4e7a,0x9801 // movec vbr,a1
+#ifdef __mcoldfire__
+ move.l 8(a1),d0
+ move.l d0,old_access
+ move.l #temp_access,d0
+ move.l d0,8(a1)
+#else
move.l 8(a1),old_access
move.l #temp_access,8(a1)
+#endif
move.l sp,a1
dc.w 0xf5c8 // translate the address (plpar (a0))
lp2_rte:
- movec vbr,a1
+ dc.w 0x4e7a,0x9801 // movec vbr,a1
+#ifdef __mcoldfire__
+ move.l old_access,d0
+ move.l d0,8(a1)
+#else
move.l old_access,8(a1)
+#endif
move.w d1,sr
bra.s l2p_exit
// This is the temporary access exception handler. If it gets called, there's
diff -x CVS -aurN freemint.orig/sys/arch/intr.S freemint/sys/arch/intr.S
--- freemint.orig/sys/arch/intr.S 2011-05-22 22:02:56.078750000 +0200
+++ freemint/sys/arch/intr.S 2011-06-11 21:13:45.921875000 +0200
@@ -18,6 +18,10 @@
// Copyright 1993,1994 Atari Corporation
// All rights reserved.
+#ifndef __mcoldfire__
+ .arch 68030
+#endif
+
#include "magic/magic.i"
//
@@ -52,7 +56,57 @@
_old_5ms:
dc.l 0
-#ifndef M68000
+#ifdef __mcoldfire__
+_mint_5ms:
+#ifdef PROFILING
+ tst.w _profil_on
+ beq.s L_no_profile
+ lea -24(sp),sp
+ movem.l d0-d2/a0-a2,(sp) // save C registers
+ move.l 26(sp),d0 // try to get interrupted PC
+ move.l d0,-(sp)
+ jsr _profil_counter // call profiler
+ addq.l #0x04,sp // this is better than lea
+ movem.l (sp),d0-d2/a0-a2 // restore C registers
+ lea 24(sp),sp
+L_no_profile:
+#endif
+ move.l d0,-(sp) // backup register
+ mvz.w vblcnt,d0
+ subq.l #0x01,d0 // each fourth interrupt makes a "VBL"
+ bne.s L_novbl_0
+ moveq #0x0004,d0
+ move.w d0,vblcnt
+ bra.s L_vbl
+L_novbl_0:
+ move.w d0,vblcnt
+ bra.s L_novbl
+L_vbl:
+ subq.l #8,sp
+ move.l 8(sp),(sp) // move the d0 backup on the top of the stack
+ clr.w 10(sp) // set up a jump to VBL emulation
+ move.l #_mint_vbl,d0
+ move.l d0,6(sp)
+ move.w sr,d0
+ move.w d0,4(sp)
+L_novbl:
+ move.l (sp)+,d0 // restore register
+ move.l _old_5ms.w(pc),-(sp) // push old vector & save a bit of memory
+ move.l a0,-(sp)
+ move.w _uptimetick,a0
+ subq.l #1,a0
+ move.w a0,_uptimetick
+ move.l _curproc,a0
+ tst.w _in_kernel
+ bne.s L_systime
+ addq.l #5,P_USRTIME(a0) // update curproc->usrtime
+ move.l (sp)+,a0
+ rts // branch to old vector
+L_systime:
+ addq.l #5,P_SYSTIME(a0) // update curproc->systime
+ move.l (sp)+,a0
+ rts
+#elif !defined(M68000)
_mint_5ms:
#ifdef PROFILING
tst.w _profil_on
@@ -157,23 +211,49 @@
// timeout things go here (50 times per second at IPL 6)
_mint_vbl:
+#ifdef __mcoldfire__
+ lea -24(sp),sp
+ movem.l d0-d2/a0-a2,(sp) // save C registers
+#else
movem.l d0-d2/a0-a2,-(sp) // save C registers
+#endif
addq.l #0x01,_c20ms
#ifdef NO_AKP_KEYBOARD
move.l _keyrec,a0
move.w 6(a0),d0
cmp.w 8(a0),d0
+#ifdef __mcoldfire__
+ sne d0
+ move.b d0,_kintr+1
+#else
sne _kintr+1
#endif
+#endif
lea _proc_clock,a0
+#ifdef __mcoldfire__
+ mvz.w (a0),d0
+#else
move.w (a0),d0
+#endif
beq.s skip
+#ifdef __mcoldfire__
+ subq.l #0x01,d0
+#else
subq.w #0x01,d0
+#endif
move.w d0,(a0)
-skip: move.w (0x0442).w,d0
+skip:
+#ifdef __mcoldfire__
+ mvz.w (0x0442).w,d0
+ mvz.w _our_clock,d1
+ sub.l d0,d1
+ move.w d1,_our_clock
+#else
+ move.w (0x0442).w,d0
sub.w d0,_our_clock
+#endif
move.l _tlist,d1
beq.s txit
@@ -181,7 +261,11 @@
move.l d1,a0
move.l TM_WHEN(a0),a1
+#ifdef __mcoldfire__
+ sub.l d0,a1
+#else
sub.w d0,a1
+#endif
move.l a1,TM_WHEN(a0)
// keyboard autorepeat
@@ -199,11 +283,21 @@
// floppy stuff
#ifdef FLOPPY_ROUTINES
+#ifdef __mcoldfire__
+ mvz.w flopc(pc),d0 // exec each 8th time
+ addq.l #0x01,d0
+#else
move.w flopc(pc),d0 // exec each 8th time
addq.w #0x01,d0
+#endif
move.w d0,flopc
+#ifdef __mcoldfire__
+ and.l #0x07,d0
+ subq.l #0x07,d0
+#else
and.w #0x07,d0
subq.w #0x07,d0
+#endif
bne.s piramida_hejhopsa
jsr _flopvbl
piramida_hejhopsa:
@@ -213,19 +307,45 @@
lea _uptimetick,a0
tst.w (a0)
bgt.s L_no_uptime
+#ifdef __mcoldfire__
+ mvz.w (a0),d0
+ add.l #200,d0
+ move.w d0,(a0)
+#else
add.w #200,(a0)
+#endif
addq.l #0x01,_uptime
+#ifdef __mcoldfire__
+ lea mod5,a0
+ mvz.w (a0),d0
+ subq.l #0x01,d0
+ move.w d0,(a0)
+ bne.s L_no_uptime
+ move.w #0x0005,(a0)
+#else
subq.w #0x01,mod5
bne.s L_no_uptime
move.w #0x0005,mod5
+#endif
jsr _calc_load_average // Go test if it's time to update uptime
L_no_uptime:
+#ifdef __mcoldfire__
+ movem.l (sp),d0-d2/a0-a2
+ lea 24(sp),sp
+#else
movem.l (sp)+,d0-d2/a0-a2
+#endif
tst.w _proc_clock // has time expired yet?
beq.s L_expired // yes -- maybe go switch processes
L_out: rte // no -- just return
-L_popnout: movem.l (sp)+,d0-d2/a0-a2
+L_popnout:
+#ifdef __mcoldfire__
+ movem.l (sp),d0-d2/a0-a2
+ lea 24(sp),sp
+#else
+ movem.l (sp)+,d0-d2/a0-a2
+#endif
#ifdef M68000
nop
#endif
@@ -238,8 +358,17 @@
bne.s L_out // no -- switching is not possible
tst.w (0x043e).w // test floppy disk lock variable
bne.s L_out // if locked, can't switch
+#ifdef __mcoldfire__
+ tst.w _in_kernel // are we doing a kernel operation?
+ bne.s L_out
+ move.l d0,-(sp)
+ moveq #0x07,d0
+ bset d0,_in_kernel
+ move.l (sp)+,d0
+#else
bset #0x07,_in_kernel // are we doing a kernel operation?
bne.s L_out
+#endif
L_switch:
clr.w -(sp) // no frame format needed
@@ -255,9 +384,15 @@
// the IPL anymore.
//
move.w sr,d0 // 2400 -> d0
+#ifdef __mcoldfire__
+ eor.l d0,d7 // 2400 eor 0000 = 2400 -> d7
+ and.l #0x0700,d7 // 2400 and 0700 = 0400 -> d7
+ eor.l d7,d0 // 0400 eor 2400 = 2000 -> d0
+#else
eor.w d0,d7 // 2400 eor 0000 = 2400 -> d7
and.w #0x0700,d7 // 2400 and 0700 = 0400 -> d7
eor.w d7,d0 // 0400 eor 2400 = 2000 -> d0
+#endif
move.w d0,sr // vbl allowed again
jsr _preempt // yield processor
@@ -265,7 +400,13 @@
// inlined leave_kernel()
move.l _curproc,a0
+#ifdef __mcoldfire__
+ move.w sr,d0
+ ori.l #0x0400,d0 // block VBL
+ move.w d0,sr
+#else
ori.w #0x0400,sr // block VBL
+#endif
clr.w _in_kernel
pea 4(a0)
jsr _restore_context // back to user (never returns)
@@ -296,9 +437,19 @@
_reset: move.w #0x2700,sr // avoid interruption here
move.l sp,0x0600.w // save A7
lea 0x06fe.w,sp // set up temporary stack
+#ifdef __mcoldfire__
+ lea -24(sp),sp
+ movem.l d0-d2/a0-a2,(sp) // save C registers
+#else
movem.l d0-d2/a0-a2,-(sp) // save C registers
+#endif
jsr _restr_intr // restore interrupts
+#ifdef __mcoldfire__
+ movem.l (sp),d0-d2/a0-a2 // restore registers
+ lea 24(sp),sp
+#else
movem.l (sp)+,d0-d2/a0-a2 // restore registers
+#endif
move.l 0x0600.w,sp
jmp (a6) // reset again
@@ -344,7 +495,12 @@
_newmvec: move.l a0,-(sp)
move.b (a0),d0
move.b d0,faked_packet
+#ifdef __mcoldfire__
+ mvz.b third_button,d1
+ or.l d1,d0
+#else
or.b third_button,d0
+#endif
move.b d0,(a0)
jsr _mouse_handler
move.l (sp)+,a0
@@ -357,8 +513,14 @@
_newjvec: move.l a0,-(sp) // save a0 on the stack
move.b 2(a0),d0 // joystick direction
+#ifdef __mcoldfire__
+ and.l #1,d0 // middle mouse button in lowest bit
+#else
and.b #1,d0 // middle mouse button in lowest bit
-#ifndef M68000
+#endif
+#ifdef __mcoldfire__
+ lsl.l #0x02,d0
+#elif !defined(M68000)
lsl.b #0x02,d0
#else
add.b d0,d0 // times 4
@@ -368,9 +530,16 @@
lea faked_packet,a0 // 'our' faked mouse event
move.b (a0),d0
+#ifdef __mcoldfire__
+ and.l #0x3,d0 // unmask our mouse button
+ or.l #0xF8,d0 // or in correct header
+ mvz.b third_button,d1
+ or.l d1,d0 // or in the current status
+#else
and.b #0x3,d0 // unmask our mouse button
or.b #0xF8,d0 // or in correct header
or.b third_button,d0 // or in the current status
+#endif
move.b d0,(a0) // write it back
move.l a0,-(sp) // pass pointer to fake packet
@@ -412,17 +581,36 @@
.globl _kbdclick
_kbdclick:
+#ifdef __mcoldfire__
+ move.l d0,-(sp)
+ moveq #0,d0
+ btst d0,(0x0484).w // conterm
+ beq.s L_nocl
+ lea -56(sp),sp
+ movem.l d1-a6,(sp)
+#else
btst #0,(0x0484).w // conterm
beq.s L_nocl
movem.l d0-a6,-(sp)
+#endif
move.l (0x05b0).w,d0 // vector to the keyclick routine
beq.s L_pop
move.l d0,a0
clr.l d0
move.w 64(sp),d0 // scancode
jsr (a0)
-L_pop: movem.l (sp)+,d0-a6
-L_nocl: rts
+L_pop:
+#ifdef __mcoldfire__
+ movem.l (sp),d1-a6
+ lea 56(sp),sp
+#else
+ movem.l (sp)+,d0-a6
+#endif
+L_nocl:
+#ifdef __mcoldfire__
+ move.l (sp)+,d0
+#endif
+ rts
// Send mouse packet to mousevec(). This is used to emulate mouse
// movements with keyboard shortcuts (alt/arrow).
@@ -430,12 +618,22 @@
.globl _send_packet
_send_packet:
+#ifdef __mcoldfire__
+ lea -60(sp),sp
+ movem.l d0-a6,(sp)
+#else
movem.l d0-a6,-(sp)
+#endif
move.l 64(sp),a2
move.l 68(sp),a0
move.l 72(sp),a1
jsr (a2)
+#ifdef __mcoldfire__
+ movem.l (sp),d0-a6
+ lea 60(sp),sp
+#else
movem.l (sp)+,d0-a6
+#endif
rts
#endif
@@ -472,11 +670,21 @@
dc.l 0
_new_bus:
#ifndef NO_FAKE_SUPER
+#ifdef __mcoldfire__
+ lea -60(sp),sp
+ movem.l d0-a6,(sp) // check_bus() relies on this!
+#else
movem.l d0-a6,-(sp) // check_bus() relies on this!
+#endif
jsr _check_bus
tst.l d0
+#ifdef __mcoldfire__
+ movem.l (sp),d0-a6
+ lea 60(sp),sp
+#else
movem.l (sp)+,d0-a6
-#ifndef M68000
+#endif
+#if !(defined(M68000) || defined(__mcoldfire__))
bne.s Return_now
#else
bne Return_now
@@ -487,7 +695,14 @@
cmp.l #30,_mcpu
bmi.s noMMU
#endif
+#ifdef __mcoldfire__
+ move.l a0,-(sp)
+ lea _sig_routine,a0
+ move.l #_mmu_sigbus,(a0)
+ move.l (sp)+,a0
+#else
move.l #_mmu_sigbus,_sig_routine
+#endif
#ifdef M68000
bra.s Do_sig
noMMU:
@@ -513,21 +728,43 @@
jsr _build_context
move.l _curproc,a4
move.l (a4),sp // put us in the system stack
+#ifdef __mcoldfire__
+ moveq #0x07,d0
+ bset d0,_in_kernel
+#else
bset #0x07,_in_kernel
+#endif
move.l _sig_routine,a1 // get signal handling routine
jsr (a1) // go do it
+#ifdef __mcoldfire__
+ move.w sr,d0
+ ori.l #0x0400,d0 // block VBL
+ move.w d0,sr
+#else
ori.w #0x0400,sr // block VBL
+#endif
jsr _leave_kernel // leave kernel
- addq.w #4,a4 // get context save area address
+ addq.l #4,a4 // get context save area address
move.l a4,-(sp) // push it
jsr _restore_context // restore the context
//
// here's what we do if we already were in the kernel
//
-Kernel: movem.l d0-d2/a0-a2,-(sp) // save reggies
+Kernel:
+#ifdef __mcoldfire__
+ lea -24(sp),sp
+ movem.l d0-d2/a0-a2,(sp) // save reggies
+#else
+ movem.l d0-d2/a0-a2,-(sp) // save reggies
+#endif
move.l _sig_routine,a1 // get handler
jsr (a1) // go do it
+#ifdef __mcoldfire__
+ movem.l (sp),d0-d2/a0-a2
+ lea 24(sp),sp
+#else
movem.l (sp)+,d0-d2/a0-a2
+#endif
// 68000 processor bug: rte right after movem can eat interrupts...
#ifdef M68000
nop
@@ -578,8 +815,13 @@
ms_060:
move.l 0xc(a1),d0 // d0 is FSLW
swap d0
+#ifdef __mcoldfire__
+ lsr.l #7,d0 // extract the access type
+ andi.l #3,d0
+#else
lsr.w #7,d0 // extract the access type
andi.w #3,d0
+#endif
move.w d0,P_EXCACCESS(a0) // save the access type
move.l 0x8(a1),a1 // a1 is the access address
move.l a1,P_EXCADDR(a0) // save the access address
@@ -613,7 +855,14 @@
#ifdef M68000
move.w #0xc,_sig_exc
#endif
+#ifdef __mcoldfire__
+ move.l a0,-(sp)
+ lea _sig_routine,a0
+ move.l #_sigaddr,(a0)
+ move.l (sp)+,a0
+#else
move.l #_sigaddr,_sig_routine
+#endif
bra Do_sig
.globl _old_ill
@@ -626,7 +875,14 @@
#ifdef M68000
move.w #0x10,_sig_exc
#endif
+#ifdef __mcoldfire__
+ move.l a0,-(sp)
+ lea _sig_routine,a0
+ move.l #_sigill,(a0)
+ move.l (sp)+,a0
+#else
move.l #_sigill,_sig_routine
+#endif
bra Do_sig
.globl _old_divzero
@@ -639,7 +895,14 @@
#ifdef M68000
move.w #0x14,_sig_exc
#endif
+#ifdef __mcoldfire__
+ move.l a0,-(sp)
+ lea _sig_routine,a0
+ move.l #_sigfpe,(a0)
+ move.l (sp)+,a0
+#else
move.l #_sigfpe,_sig_routine
+#endif
bra Do_sig
.globl _old_linef
@@ -652,7 +915,14 @@
#ifdef M68000
move.w #0x2c,_sig_exc
#endif
+#ifdef __mcoldfire__
+ move.l a0,-(sp)
+ lea _sig_routine,a0
+ move.l #_sigill,(a0)
+ move.l (sp)+,a0
+#else
move.l #_sigill,_sig_routine
+#endif
bra Do_sig
.globl _old_chk
@@ -665,7 +935,14 @@
#ifdef M68000
move.w #0x18,_sig_exc
#endif
+#ifdef __mcoldfire__
+ move.l a0,-(sp)
+ lea _sig_routine,a0
+ move.l #_sigfpe,(a0)
+ move.l (sp)+,a0
+#else
move.l #_sigfpe,_sig_routine
+#endif
bra Do_sig
.globl _old_trapv
@@ -678,7 +955,14 @@
#ifdef M68000
move.w #0x1c,_sig_exc
#endif
+#ifdef __mcoldfire__
+ move.l a0,-(sp)
+ lea _sig_routine,a0
+ move.l #_sigfpe,(a0)
+ move.l (sp)+,a0
+#else
move.l #_sigfpe,_sig_routine
+#endif
bra Do_sig
.globl _old_fpcp_0,_old_fpcp_1,_old_fpcp_2,_old_fpcp_3,_old_fpcp_4
@@ -726,7 +1010,14 @@
dc.l 0
_new_fpcp:
// don't set _sig_exc - only needed for 68000 vectors
+#ifdef __mcoldfire__
+ move.l a0,-(sp)
+ lea _sig_routine,a0
+ move.l #_sigfpe,(a0)
+ move.l (sp)+,a0
+#else
move.l #_sigfpe,_sig_routine
+#endif
bra Do_sig
.globl _old_mmuconf,_new_mmuconf
@@ -737,7 +1028,14 @@
dc.l 0
_new_mmuconf:
// don't set _sig_exc - only needed for 68000 vectors
+#ifdef __mcoldfire__
+ move.l a0,-(sp)
+ lea _sig_routine,a0
+ move.l #_sigill,(a0)
+ move.l (sp)+,a0
+#else
move.l #_sigill,_sig_routine
+#endif
bra Do_sig
.globl _old_pmmuill
@@ -748,7 +1046,14 @@
dc.l 0
_new_mmu:
// don't set _sig_exc - only needed for 68000 vectors
+#ifdef __mcoldfire__
+ move.l a0,-(sp)
+ lea _sig_routine,a0
+ move.l #_sigill,(a0)
+ move.l (sp)+,a0
+#else
move.l #_sigill,_sig_routine
+#endif
bra Do_sig
.globl _old_pmmuacc
@@ -760,7 +1065,14 @@
_new_pmmuacc:
// don't set _sig_exc - only needed for 68000 vectors
+#ifdef __mcoldfire__
+ move.l a0,-(sp)
+ lea _sig_routine,a0
+ move.l #_sigbus,(a0)
+ move.l (sp)+,a0
+#else
move.l #_sigbus,_sig_routine
+#endif
bra Do_sig
.globl _old_uninit
@@ -773,7 +1085,14 @@
#ifdef M68000
move.w #0x3c,_sig_exc
#endif
+#ifdef __mcoldfire__
+ move.l a0,-(sp)
+ lea _sig_routine,a0
+ move.l #_sigbus,(a0)
+ move.l (sp)+,a0
+#else
move.l #_sigbus,_sig_routine
+#endif
bra Do_sig
.globl _old_spurious
@@ -786,7 +1105,14 @@
#ifdef M68000
move.w #0x60,_sig_exc
#endif
+#ifdef __mcoldfire__
+ move.l a0,-(sp)
+ lea _sig_routine,a0
+ move.l #_sigbus,(a0)
+ move.l (sp)+,a0
+#else
move.l #_sigbus,_sig_routine
+#endif
bra Do_sig
.globl _old_format
@@ -796,7 +1122,14 @@
_old_format:
dc.l 0
_new_format:
+#ifdef __mcoldfire__
+ move.l a0,-(sp)
+ lea _sig_routine,a0
+ move.l #_haltformat,(a0)
+ move.l (sp)+,a0
+#else
move.l #_haltformat,_sig_routine
+#endif
bra Do_sig
.globl _old_cpv
@@ -806,7 +1139,14 @@
_old_cpv:
dc.l 0
_new_cpv:
+#ifdef __mcoldfire__
+ move.l a0,-(sp)
+ lea _sig_routine,a0
+ move.l #_haltcpv,(a0)
+ move.l (sp)+,a0
+#else
move.l #_haltcpv,_sig_routine
+#endif
bra Do_sig
.globl _check_priv,_old_priv
@@ -819,19 +1159,36 @@
#ifdef M68000
move.w #0x20,_sig_exc
#endif
+#ifdef __mcoldfire__
+ move.l a0,-(sp)
+ lea _sig_routine,a0
+ move.l #_sigpriv,(a0)
+ move.l (sp)+,a0
+#else
move.l #_sigpriv,_sig_routine
+#endif
#ifdef M68000
tst.w (0x59e).w // 68000s always get SIGPRIV
beq Do_sig
#endif
#ifndef M68000
+#ifdef __mcoldfire__
+ lea -60(sp),sp
+ movem.l d0-a6,(sp) // check_priv() relies on this!
+#else
movem.l d0-a6,-(sp) // check_priv() relies on this!
+#endif
move.l sp,d0
move.l d0,-(sp)
jsr _check_priv
addq.l #4,sp
tst.l d0
+#ifdef __mcoldfire__
+ movem.l (sp),d0-a6
+ lea 60(sp),sp
+#else
movem.l (sp)+,d0-a6
+#endif
beq Do_sig
#endif
rte
@@ -846,6 +1203,43 @@
_old_trace:
dc.l 0
_new_trace:
+#ifdef __mcoldfire__
+ move.l d0,-(sp)
+ btst #5,4(sp) // only check when called from supervisor mode
+ beq.s S_1
+ move.l #_mint_dos,d0
+ cmp.l 6(sp),d0 // lets not trace the kernel !
+ beq.s S_2
+ move.l #_mint_xbios,d0
+ cmp.l 6(sp),d0
+ beq.s S_2
+ move.l #_mint_bios,d0
+ cmp.l 6(sp),d0
+ beq.s S_2
+ move.l #_new_divzero,d0
+ cmp.l 6(sp),d0
+ beq.s S_2
+ move.l #_new_trapv,d0
+ cmp.l 6(sp),d0
+ beq.s S_2
+ move.l #_new_chk,d0
+ cmp.l 6(sp),d0
+ beq.s S_2
+
+// add any other non-traceable entities here...
+
+S_1: moveq #0x24,d0
+ move.w d0,_sig_exc
+ move.l #_sigtrap,d0
+ move.l d0,_sig_routine
+ move.l (sp)+,d0
+ bra Do_sig
+
+S_2: move.w 4(sp),d0
+ and.l #0x3fff,d0 // clear both trace bits
+ move.w d0,4(sp)
+ move.l (sp)+,d0
+#else
btst #5,(sp) // only check when called from supervisor mode
beq.s S_1
cmp.l #_mint_dos,2(sp) // lets not trace the kernel !
@@ -868,6 +1262,7 @@
bra Do_sig
S_2: and.w #0x3fff,(sp) // clear both trace bits
+#endif
rte // and re-start the handler
//
@@ -889,16 +1284,33 @@
_old_getbpb:
dc.l 0
_new_getbpb:
+#ifdef __mcoldfire__
+ mvz.w 4(sp),d0 // check the drive
+#else
move.w 4(sp),d0 // check the drive
+#endif
cmp.w #0x1f,d0 // legal drive?
bhi.s noalias0 // no
+#ifdef __mcoldfire__
+ move.l d0,d1 // get index
+ add.l d0,d1 // convert to index
+#else
move.w d0,d1 // get index
add.w d0,d1 // convert to index
+#endif
lea _aliasdrv,a0
+#ifdef __mcoldfire__
+ move.w 0(a0,d1.l),d1 // alias drive?
+#else
move.w 0(a0,d1.w),d1 // alias drive?
+#endif
beq.s noalias0
move.w d1,d0
+#ifdef __mcoldfire__
+ subq.l #1,d0 // adjust for aliasdrv base of '@'
+#else
subq.w #1,d0 // adjust for aliasdrv base of '@'
+#endif
cmp.w #0x1f,d0 // is this a legal drive?
bhi.s nobpb // no -- ignore it
noalias0:
@@ -916,16 +1328,33 @@
_old_mediach:
dc.l 0
_new_mediach:
+#ifdef __mcoldfire__
+ mvz.w 4(sp),d0 // check the drive
+#else
move.w 4(sp),d0 // check the drive
+#endif
cmp.w #0x1f,d0 // legal drive?
bhi.s noalias1 // no
+#ifdef __mcoldfire__
+ move.l d0,d1 // get index
+ add.l d0,d1 // convert to index
+#else
move.w d0,d1 // get index
add.w d0,d1 // convert to index
+#endif
lea _aliasdrv,a0
+#ifdef __mcoldfire__
+ move.w 0(a0,d1.l),d1 // alias drive?
+#else
move.w 0(a0,d1.w),d1 // alias drive?
+#endif
beq.s noalias1
move.w d1,d0
+#ifdef __mcoldfire__
+ subq.l #1,d0 // adjust for aliasdrv base
+#else
subq.w #1,d0 // adjust for aliasdrv base
+#endif
cmp.w #0x1f,d0 // legal drive?
bhi.s nobpb // no -- ignore it
noalias1:
@@ -942,16 +1371,33 @@
_old_rwabs:
dc.l 0
_new_rwabs:
+#ifdef __mcoldfire__
+ mvz.w 0xe(sp),d0 // check the drive
+#else
move.w 0xe(sp),d0 // check the drive
+#endif
cmp.w #0x1f,d0 // legal drive?
bhi.s noalias2 // no
+#ifdef __mcoldfire__
+ move.l d0,d1 // get index
+ add.l d0,d1 // convert to index
+#else
move.w d0,d1 // get index
add.w d0,d1 // convert to index
+#endif
lea _aliasdrv,a0
+#ifdef __mcoldfire__
+ move.w 0(a0,d1.l),d1 // alias drive?
+#else
move.w 0(a0,d1.w),d1 // alias drive?
+#endif
beq.s noalias2
move.w d1,d0
+#ifdef __mcoldfire__
+ subq.l #1,d0 // adjust for aliasdrv base
+#else
subq.w #1,d0 // adjust for aliasdrv base
+#endif
cmp.w #0x1f,d0 // legal drive?
bhi.s nobpb // no -- ignore it
noalias2:
diff -x CVS -aurN freemint.orig/sys/arch/syscall.S freemint/sys/arch/syscall.S
--- freemint.orig/sys/arch/syscall.S 2007-07-13 23:32:49.000000000 +0200
+++ freemint/sys/arch/syscall.S 2011-06-11 15:20:35.859375000 +0200
@@ -53,6 +53,10 @@
*
*/
+#ifndef __mcoldfire__
+ .arch 68030
+#endif
+
#include "magic/magic.i"
.text
@@ -113,7 +117,12 @@
beq.s norm_gemdos
movea.l sp,a0
+#ifdef __mcoldfire__
+ lea -44(sp),sp
+ movem.l d2-d7/a2-a6,(sp)
+#else
movem.l d2-d7/a2-a6,-(sp)
+#endif
lea _dos_tab,a5
move.w _dos_max,d5
bra reentrant_trap
@@ -133,14 +142,27 @@
move.l _curproc,a0
move.l (a0),sp // this puts us in our private stack
#ifdef NEW_SYSCALL
+#ifdef __mcoldfire__
+ mvz.w (a1),d1
+#else
move.w (a1),d1
+#endif
cmp.w _dos_max,d1
bcc gemdos
// offset 0 is func pointer, 4 is nr of args, 6 is their size
-nospr: move.w 6(a5,d1.w*8),d1 // fetch size in bytes
+nospr:
+#ifdef __mcoldfire__
+ move.w 6(a5,d1.l*8),d1 // fetch size in bytes
+ lsr.l #1,d1 // we need size in words
+cparg: move.w (a1,d1.l*2),-(sp)
+ subq.l #1,d1
+ bpl.s cparg
+#else
+ move.w 6(a5,d1.w*8),d1 // fetch size in bytes
lsr.w #1,d1 // we need size in words
cparg: move.w (a1,d1.w*2),-(sp)
dbra.w d1,cparg
+#endif
#else
move.l 32(a1),-(sp) // a1 was set by build_context
move.l 28(a1),-(sp)
@@ -154,7 +176,12 @@
#endif
noargs: jsr _enter_gemdos // set up vectors appropriately
#ifdef DEBUG_INFO
+#ifdef __mcoldfire__
+ move.w #4201,d1
+ cmp.w (sp),d1 // special case Sys_Printf
+#else
cmpi.w #4201,(sp) // special case Sys_Printf
+#endif
bne.s no_sys_printf
clr.w (sp) // manipulate function number
lea _sys_mon_tab,a5 // tab
@@ -186,7 +213,12 @@
beq norm_xbios
movea.l sp,a0
+#ifdef __mcoldfire__
+ lea -44(sp),sp
+ movem.l d2-d7/a2-a6,(sp)
+#else
movem.l d2-d7/a2-a6,-(sp)
+#endif
lea _xbios_tab,a5
move.w _xbios_max,d5
bra reentrant_trap
@@ -200,7 +232,7 @@
lea 6(sp),a1 // supervisor mode: args on stack
tst.w (0x59e).w // test longframe
beq.s LX_check
- addq.w #2,a1 // stack is a bit bigger
+ addq.l #2,a1 // stack is a bit bigger
#endif
bra.s LX_check
LX_usr:
@@ -210,11 +242,26 @@
LX_check:
move.l _curproc,a0
+#ifdef __mcoldfire__
+ moveq #17,d1
+ cmp.w (a1),d1 // no need to forbid Random()
+#else
cmp.w #17,(a1) // no need to forbid Random()
+#endif
beq.s pok
+#ifdef __mcoldfire__
+ moveq #21,d1
+ cmp.w (a1),d1 // Cursconf() gets converted to ioctl()
+#else
cmp.w #21,(a1) // Cursconf() gets converted to ioctl()
+#endif
beq.s pok
+#ifdef __mcoldfire__
+ moveq #38,d1
+ cmp.w (a1),d1 // Supexec() has own protection code
+#else
cmp.w #38,(a1) // Supexec() has own protection code
+#endif
beq.s pok
tst.w _secure_mode // the rest is subject to check
beq.s pok
@@ -224,14 +271,29 @@
#ifndef M68000
tst.w _falcontos // on TOS 4.0 - 4.04...
beq.s sk
+#ifdef __mcoldfire__
+ moveq #5,d1
+ cmp.w (a1),d1 // ...check for Setscreen command
+#else
cmp.w #5,(a1) // ...check for Setscreen command
+#endif
beq.s LX_rom // no -- fall through
// DSP XBIOS is Falcon030 only - am I right?
+#ifdef __mcoldfire__
+ moveq #108,d1
+ cmp.w (a1),d1 // Dsp_LoadProg()
+#else
cmp.w #108,(a1) // Dsp_LoadProg()
+#endif
beq.s LX_rom
+#ifdef __mcoldfire__
+ moveq #111,d1
+ cmp.w (a1),d1 // Dsp_LodToBinary()
+#else
cmp.w #111,(a1) // Dsp_LodToBinary()
+#endif
beq.s LX_rom
#endif
// _curproc is already in a0 here
@@ -298,7 +360,12 @@
beq norm_bios
movea.l sp,a0
+#ifdef __mcoldfire__
+ lea -44(sp),sp
+ movem.l d2-d7/a2-a6,(sp)
+#else
movem.l d2-d7/a2-a6,-(sp)
+#endif
lea _bios_tab,a5
move.w _bios_max,d5
bra reentrant_trap
@@ -333,7 +400,13 @@
L_1out:
addq.l #2,sp
L_0out:
+#ifdef __mcoldfire__
+ move.w sr,d1
+ ori.l #0x0400,d1 // spl7()
+ move.w d1,sr
+#else
ori.w #0x0400,sr // spl7()
+#endif
jsr _leave_kernel // does not change d0
rte // return to user
L_00:
@@ -341,7 +414,7 @@
bne.s L_01
move.w 2(a1),-(sp) // yes; push argument
jsr _do_bconin
- addq.w #2,sp
+ addq.l #2,sp
cmp.w #0xdead,d0 // would Bconin block?
bne.s L_0out // no -- we're done
bra.s L_bios // yes -- do the long stuff
@@ -411,15 +484,27 @@
//
// figure out which routine to call
//
+#ifdef __mcoldfire__
+ mvz.w (sp),d1
+#else
move.w (sp),d1
+#endif
cmp.w d5,d1
bcc error
#ifndef M68000
#ifdef NEW_SYSCALL
+#ifdef __mcoldfire__
+ move.l 0(a5,d1.l*8),d1
+#else
move.l 0(a5,d1.w*8),d1
+#endif
+#else
+#ifdef __mcoldfire__
+ move.l 0(a5,d1.l*4),d1 // d0 = syscall_tab[d0]
#else
move.l 0(a5,d1.w*4),d1 // d0 = syscall_tab[d0]
#endif
+#endif
#else
#ifdef NEW_SYSCALL
add.w d1,d1
@@ -429,7 +514,7 @@
move.l 0(a5,d1.w),d1 // d0 = syscall_tab[d0]
#endif
beq error // null entry means invalid call
- addq.w #2,sp // pop function number off stack
+ addq.l #2,sp // pop function number off stack
move.l d1,a0
jsr (a0) // go do the call
@@ -442,8 +527,14 @@
tst.l P_PTRACER(a0) // check curproc->ptracer, if not set
beq.s notrace // then no pending trace this ensures
move.w d0,d1 // we work with non-MiNT debuggers
+#ifdef __mcoldfire__
+ and.l #0xc000,d1 // are either of the trace bits set
+ sne d1
+ move.b d1,P_SYSCTXT+C_PTRACE(a0) // mark as trace pending/not
+#else
and.w #0xc000,d1 // are either of the trace bits set
sne P_SYSCTXT+C_PTRACE(a0) // mark as trace pending/not
+#endif
notrace:
tst.w d2 // If D2 set, dont preemtp
bne.s nosleep
@@ -474,7 +565,13 @@
noreload2:
jsr _check_sigs
nosig:
+#ifdef __mcoldfire__
+ move.w sr,d1
+ ori.l #0x0400,d1 // spl7()
+ move.w d1,sr
+#else
ori.w #0x0400,sr // spl7()
+#endif
clr.l _unwound_stack
jsr _leave_kernel // restore vectors (loads a0)
pea 4(a0)
@@ -498,15 +595,33 @@
bne.s new_dev // no -- maybe we can't do this
put_buf:
move.w 4(a1),d0 // get the character to output
+#ifdef __mcoldfire__
+ mvz.w _bconbsiz,d1 // get index into buffer table
+#else
move.w _bconbsiz,d1 // get index into buffer table
+#endif
cmp.w #255,d1 // buffer full?
beq L_bios // yes -- flush it out
lea _bconbuf,a0
+#ifdef __mcoldfire__
+ add.l d1,a0
+#else
add.w d1,a0
+#endif
move.b d0,(a0) // store the character
+#ifdef __mcoldfire__
+ addq.l #1,d1
+#else
addq.w #1,d1
+#endif
move.w d1,_bconbsiz
+#ifdef __mcoldfire__
+ move.w sr,d1
+ ori.l #0x0400,d1 // spl7()
+ move.w d1,sr
+#else
ori.w #0x0400,sr // spl7()
+#endif
jsr _leave_kernel // restore vectors
moveq.l #-1,d0 // return character output OK
rte
@@ -558,12 +673,22 @@
tst.w _in_kernel
beq.s norm_trap2
+#ifdef __mcoldfire__
+ lea -56(sp),sp
+ movem.l d1-d7/a0-a6,(sp)
+#else
movem.l d1-d7/a0-a6,-(sp)
+#endif
lea ((7+7)*4)(sp),a0
bra reentrant_trap2
norm_trap2:
+#ifdef __mcoldfire__
+ lea _in_kernel,a0
+ bset #0x07,(a0)
+#else
bset #0x07,_in_kernel
+#endif
// The AES/VDI passes parameters in D0/D1, so we do not touch
// them registers..
@@ -603,7 +728,7 @@
move.l d2,a0
move.l d1,-(sp) // VDI parameter block address
jsr (a0)
- addq.w #4,sp
+ addq.l #4,sp
moveq #1,d2 // nonzero D2 prevents preempt
bra.s trap2_out
@@ -615,7 +740,7 @@
move.l d2,a0
move.l d1,-(sp)
jsr (a0)
- addq.w #4,sp
+ addq.l #4,sp
moveq #0,d2 // zero D2 allows preempt
bra.s trap2_out
@@ -667,8 +792,14 @@
move.w (sp),-(sp)
move.w 4(sp),2(sp)
clr.w 4(sp)
-TE_D: move.w sr,-(sp)
-#ifndef M68000
+TE_D:
+#ifdef __mcoldfire__
+ move.w sr,d0
+ move.w d0,-(sp)
+#else
+ move.w sr,-(sp)
+#endif
+#if !(defined(M68000) || defined(__mcoldfire__))
jmp ([_old_dos])
#else
move.l _old_dos.w(pc),-(sp)
@@ -685,8 +816,17 @@
move.w (sp),-(sp)
move.w 4(sp),2(sp)
clr.w 4(sp)
-TE_AV: move.w sr,-(sp)
-#ifndef M68000
+TE_AV:
+#ifdef __mcoldfire__
+ subq.l #4,sp
+ move.w d0,(sp)
+ move.w sr,d0
+ move.w d0,2(sp)
+ move.w (sp)+,d0
+#else
+ move.w sr,-(sp)
+#endif
+#if !(defined(M68000) || defined(__mcoldfire__))
jmp ([_old_trap2])
#else
move.l _old_trap2.w(pc),-(sp)
@@ -701,8 +841,14 @@
move.w (sp),-(sp)
move.w 4(sp),2(sp)
clr.w 4(sp)
-TE_B: move.w sr,-(sp)
-#ifndef M68000
+TE_B:
+#ifdef __mcoldfire__
+ move.w sr,d0
+ move.w d0,-(sp)
+#else
+ move.w sr,-(sp)
+#endif
+#if !(defined(M68000) || defined(__mcoldfire__))
jmp ([_old_bios])
#else
move.l _old_bios.w(pc),-(sp)
@@ -717,8 +863,14 @@
move.w (sp),-(sp)
move.w 4(sp),2(sp)
clr.w 4(sp)
-TE_X: move.w sr,-(sp)
-#ifndef M68000
+TE_X:
+#ifdef __mcoldfire__
+ move.w sr,d0
+ move.w d0,-(sp)
+#else
+ move.w sr,-(sp)
+#endif
+#if !(defined(M68000) || defined(__mcoldfire__))
jmp ([_old_xbios])
#else
move.l _old_xbios.w(pc),-(sp)
@@ -761,13 +913,17 @@
.globl _lineA0
_lineA0:
- movem.l d2/a2,-(sp) // save scratch registers
-#ifdef COLDFIRE
- jsr 0xE09512 // TOS40
+#ifdef __mcoldfire__
+ move.l a2,-(sp) // save scratch registers
+ move.l d2,-(sp)
+ dc.w 0xa920 // call the line A initialization routine
+ move.l (sp)+,d2
+ move.l (sp)+,a2
#else
+ movem.l d2/a2,-(sp) // save scratch registers
dc.w 0xa000 // call the line A initialization routine
-#endif
movem.l (sp)+,d2/a2
+#endif
rts
//
@@ -780,9 +936,19 @@
_call_aes:
move.l 4(sp),d1 // fetch pointer to parameter block
move.l #200,d0 // magic number for AES
+#ifdef __mcoldfire__
+ move.l a2,-(sp) // save scratch registers
+ move.l d2,-(sp)
+#else
movem.l d2/a2,-(sp) // save scratch registers
+#endif
trap #2
+#ifdef __mcoldfire__
+ move.l (sp)+,d2
+ move.l (sp)+,a2
+#else
movem.l (sp)+,d2/a2
+#endif
rts
//
@@ -801,13 +967,28 @@
_callout:
lea 8(sp),a0 // pointer to args
move.l 4(sp),a1 // pointer to pointer to function
+#ifdef __mcoldfire__
+ lea -44(sp),sp
+ movem.l d2-d7/a2-a6,(sp) // save registers
+#else
movem.l d2-d7/a2-a6,-(sp) // save registers
+#endif
movem.l (a0),d0-d7 // copy parameters
+#ifdef __mcoldfire__
+ lea -32(sp),sp
+ movem.l d0-d7,(sp)
+#else
movem.l d0-d7,-(sp)
+#endif
suba.l a5,a5 // the BIOS expects 0 in a5
jsr (a1) // go do it
lea 32(sp),sp
+#ifdef __mcoldfire__
+ movem.l (sp),d2-d7/a2-a6 // restore reggies
+ lea 44(sp),sp
+#else
movem.l (sp)+,d2-d7/a2-a6 // restore reggies
+#endif
rts
//
// _callout2 and _callout1 are for functions with just 1 or
@@ -820,41 +1001,95 @@
_callout1:
_callout2:
movem.l 4(sp),a0/a1 // get function ptr & args
+#ifdef __mcoldfire__
+ lea -44(sp),sp
+ movem.l d2-d7/a2-a6,(sp) // save reggies
+#else
movem.l d2-d7/a2-a6,-(sp) // save reggies
+#endif
move.l a1,-(sp) // push args
suba.l a5,a5 // the BIOS expects 0 in a5
jsr (a0) // do function
- addq.w #4,sp
+ addq.l #4,sp
+#ifdef __mcoldfire__
+ movem.l (sp),d2-d7/a2-a6 // restore reggies
+ lea 44(sp),sp
+#else
movem.l (sp)+,d2-d7/a2-a6 // restore reggies
+#endif
rts
//
// _callout6 passes 6 words, saving sr
//
_callout6:
+#ifdef __mcoldfire__
+ lea -44(sp),sp
+ movem.l d2-d7/a2-a6,(sp) // save registers
+#else
movem.l d2-d7/a2-a6,-(sp) // save registers
+#endif
movem.l 4+44(sp),a0-a3 // get function ptr & args
+#ifdef __mcoldfire__
+ move.w sr,d2
+ move.w d2,-(sp)
+ lea -12(sp),sp
+ movem.l a1-a3,(sp) // copy args
+#else
move.w sr,-(sp)
movem.l a1-a3,-(sp) // copy args
+#endif
suba.l a5,a5 // the BIOS expects 0 in a5
jsr (a0) // go do it
lea 12(sp),sp
+#ifdef __mcoldfire__
+ move.w (sp)+,d2
+ move.w d2,sr
+ movem.l (sp),d2-d7/a2-a6 // restore reggies
+ lea 44(sp),sp
+#else
move.w (sp)+,sr
movem.l (sp)+,d2-d7/a2-a6 // restore reggies
+#endif
rts
//
// _callout6spl7 passes 6 words at ipl7
//
_callout6spl7:
+#ifdef __mcoldfire__
+ lea -44(sp),sp
+ movem.l d2-d7/a2-a6,(sp) // save registers
+#else
movem.l d2-d7/a2-a6,-(sp) // save registers
+#endif
movem.l 4+44(sp),a0-a3 // get function ptr & args
+#ifdef __mcoldfire__
+ move.w (sp)+,d2
+ move.w d2,sr
+ lea -12(sp),sp
+ movem.l a1-a3,(sp) // copy args
+#else
move.w sr,-(sp)
movem.l a1-a3,-(sp) // copy args
+#endif
suba.l a5,a5 // the BIOS expects 0 in a5
+#ifdef __mcoldfire__
+ move.w sr,d2
+ ori.l #0x0700,d2 // spl7()
+ move.w d2,sr
+#else
ori.w #0x0700,sr // spl7()
+#endif
jsr (a0) // go do it
lea 12(sp),sp
+#ifdef __mcoldfire__
+ move.w (sp)+,d2
+ move.w d2,sr
+ movem.l (sp),d2-d7/a2-a6 // restore reggies
+ lea 44(sp),sp
+#else
move.w (sp)+,sr
movem.l (sp)+,d2-d7/a2-a6 // restore reggies
+#endif
rts
//
@@ -904,21 +1139,31 @@
//
reentrant_trap:
#ifdef M68000
- addq.w #2+4,a0
+ addq.l #2+4,a0
tst.w (0x59e).w
beq.s reent_shortframe
- addq.w #2,a0
+ addq.l #2,a0
reent_shortframe:
#else
- addq.w #2+4+2,a0
+ addq.l #2+4+2,a0
#endif
// Save hardware registers (CPU/FPU)
tst.w _fpu
beq.s reent_fpu_saved
+#ifdef __mcoldfire__
+ lea -16(sp),sp
+ fsave (sp)
+#else
fsave -(sp)
+#endif
#ifndef M68000
+#ifdef __mcoldfire__
+ moveq #60,d1
+ cmp.w _mcpu+2,d1
+#else
cmp.w #60,_mcpu+2
+#endif
bne.s reent_no_060
tst.b 2(sp)
beq.s reent_fpu_notused
@@ -929,8 +1174,16 @@
tst.b (sp)
beq.s reent_fpu_notused
reent_save_fpu:
+#ifdef __mcoldfire__
+ lea -64(sp),sp
+ fmovem.d fp0-fp7,(sp)
+ fmove.l fpiar,-(sp)
+ fmove.l fpsr,-(sp)
+ fmove.l fpcr,-(sp)
+#else
fmovem.x fp0-fp7,-(sp)
fmovem.l fpcr/fpsr/fpiar,-(sp)
+#endif
move.w #1,-(sp)
bra.s reent_fpu_saved
reent_fpu_notused:
@@ -963,7 +1216,11 @@
moveq #24,d5
cmpa.l #_dos_tab,a5
bne.s reent_24
+ #ifdef __mcoldfire__
+ addq.l #8,d5
+ #else
addq.w #8,d5
+ #endif
reent_24:
// ---------- END without NEW_SYSCALL ---------------
@@ -983,40 +1240,80 @@
move.l (a5,d1.l),d2
#endif
beq.s reent_nofunc
- #ifndef M68000
+ #ifdef __mcoldfire__
+ mvz.w 6(a5,d1.l*8),d5
+ #elif !defined(M68000)
move.w 6(a5,d1.l*8),d5
#else
move.w 6(a5,d1.l),d5
#endif
#endif //NEW_SYSCALL
// ------------ END with NEW_SYSCALL ------------------
+#ifdef __mcoldfire__
+ add.l d5,a0 // A0 now points to the last parameter (first one pushed)
+ subq.l #2,d5 // Skip the Function number
+ move.l d5,d1
+#else
add.w d5,a0 // A0 now points to the last parameter (first one pushed)
subq.w #2,d5 // Skip the Function number
move.w d5,d1
+#endif
beq.s reent_noargs // No args (only function number)
+#ifdef __mcoldfire__
+ lsr.l #1,d1 // Turn bytes into words
+ subq.l #1,d1
+#else
lsr.w #1,d1 // Turn bytes into words
subq.w #1,d1
+#endif
reent_cpyargs:
move.w -(a0),-(sp)
+#ifdef __mcoldfire__
+ subq.l #1,d1
+ bpl.s reent_cpyargs
+#else
dbra d1,reent_cpyargs
+#endif
reent_noargs:
move.l d2,a0 // Function address
jsr (a0)
moveq #0,d1 // Clear D1 -- we're not gonna call anything else
reent_out:
+#ifdef __mcoldfire__
+ add.l d5,sp // Correct stack
+#else
add.w d5,sp // Correct stack
+#endif
// Unstack all cpu/fpu registers...
tst.w _fpu
beq.s reent_out_no_fpu
tst.w (sp)+
beq.s reent_no_fpu_saved
+#ifdef __mcoldfire__
+ fmove.l (sp)+,fpcr
+ fmove.l (sp)+,fpsr
+ fmove.l (sp)+,fpiar
+ fmovem.d (sp),fp0-fp7
+ lea 64(sp),sp
+#else
fmovem.l (sp)+,fpcr/fpsr/fpiar
fmovem.x (sp)+,fp0-fp7
+#endif
reent_no_fpu_saved:
+#ifdef __mcoldfire__
+ frestore (sp)
+ lea 16(sp),sp
+#else
frestore (sp)+
+#endif
reent_out_no_fpu:
+#ifdef __mcoldfire__
+ movem.l (sp),d2-d7/a2-a6
+ lea 44(sp),sp
+#else
movem.l (sp)+,d2-d7/a2-a6
+#endif
tst.l d1 // If D1 is not NULL, it is the address of some old trap
bne.s reent_call_rom
rte
@@ -1061,22 +1358,32 @@
// we wont bother with it. VDI/AES passes args in D0/D1.
#ifdef TRAP2_STACK_PARAMS
#ifdef M68000
- addq.w #2+4,a0
+ addq.l #2+4,a0
tst.w (0x59e).w
beq.s reent2_shortframe
- addq.w #2,a0
+ addq.l #2,a0
reent2_shortframe:
#else
- addq.w #2+4+2,a0
+ addq.l #2+4+2,a0
#endif
#endif
// Save hardware registers (CPU/FPU)
tst.w _fpu
beq.s reent2_fpu_saved
+#ifdef __mcoldfire__
+ lea -16(sp),sp
+ fsave (sp)
+#else
fsave -(sp)
+#endif
#ifndef M68000
+#ifdef __mcoldfire__
+ moveq #60,d1
+ cmp.w _mcpu+2,d1
+#else
cmp.w #60,_mcpu+2
+#endif
bne.s reent2_no_060
tst.b 2(sp)
beq.s reent2_fpu_notused
@@ -1087,8 +1394,16 @@
tst.b (sp)
beq.s reent2_fpu_notused
reent2_save_fpu:
+#ifdef __mcoldfire__
+ lea -64(sp),sp
+ fmovem.d fp0-fp7,(sp)
+ fmove.l fpiar,-(sp)
+ fmove.l fpsr,-(sp)
+ fmove.l fpcr,-(sp)
+#else
fmovem.x fp0-fp7,-(sp)
fmovem.l fpcr/fpsr/fpiar,-(sp)
+#endif
move.w #1,-(sp)
bra.s reent2_fpu_saved
reent2_fpu_notused:
@@ -1125,7 +1440,7 @@
move.l d2,a0
move.l d1,-(sp)
jsr (a0)
- addq.w #4,sp
+ addq.l #4,sp
moveq #0,d2
bra.s reent2_trap2_out
@@ -1137,7 +1452,7 @@
move.l d2,a0
move.l d1,-(sp)
jsr (a0)
- addq.w #4,sp
+ addq.l #4,sp
moveq #0,d2
bra.s reent2_trap2_out
@@ -1172,16 +1487,39 @@
beq.s reent2_out_no_fpu
tst.w (sp)+
beq.s reent2_no_fpu_saved
+#ifdef __mcoldfire__
+ fmove.l (sp)+,fpcr
+ fmove.l (sp)+,fpsr
+ fmove.l (sp)+,fpiar
+ fmovem.d (sp),fp0-fp7
+ lea 64(sp),sp
+#else
fmovem.l (sp)+,fpcr/fpsr/fpiar
fmovem.x (sp)+,fp0-fp7
+#endif
reent2_no_fpu_saved:
+#ifdef __mcoldfire__
+ frestore (sp)
+ lea 16(sp),sp
+#else
frestore (sp)+
+#endif
reent2_out_no_fpu:
tst.l d2
bne.s reent2_call_old
+#ifdef __mcoldfire__
+ movem.l (sp),d1-d7/a0-a6
+ lea 56(sp),sp
+#else
movem.l (sp)+,d1-d7/a0-a6
+#endif
rte
reent2_call_old:
+#ifdef __mcoldfire__
+ movem.l (sp),d1-d7/a0-a6
+ lea 56(sp),sp
+#else
movem.l (sp)+,d1-d7/a0-a6
+#endif
move.l _old_trap2,-(sp)
rts